Description: 该代码为配合7号信令模块MK50H27的cpld(xilinx 95144)的逻辑代码,其中包括了VHDL及原理图.-the code to meet on the 7th of signaling modules MK50H27 cpld (Xilinx 95144 ) logic code, which included a schematic and VHDL. Platform: |
Size: 720896 |
Author:王珏 |
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Description: xilinx 开发板原理图,里面含有pcb图,自己完全可以做一块来玩,不用买别人的,很省钱,又锻炼了自己.-Xilinx development board schematic diagram, which contains pcb chart their own can make a play, do not buy someone else Platform: |
Size: 305152 |
Author:萧勇 |
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Description: 本实验教程选用Xilinx公司的产品X9572，与之配套的开发软件为ISE4.1i，可进行原理图的输入和VHDL硬件描述语言的输入，并且可利用Modelsim进行功能仿真和时序仿真。-In this study, selected Xilinx tutorial products X9572, with supporting the development of software for ISE4.1i, schematic can be input and VHDL hardware description language input, and can use Modelsim functional simulation and timing simulation. Platform: |
Size: 584704 |
Author:bin |
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Description: XILINX 开发板，原理图主要由XC4000和一个8031构成-XILINX development board, mainly by the XC4000 Schematic and 8031 constitute a Platform: |
Size: 1675264 |
Author:zhang |
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Description: Xilinx公司 Virtex4 FPGA官方评估板的电路原理图和相应的PCB文件。是Virtex FPGA硬件电路设计的典范参考设计。其中，PCB文件是PADS格式。-Xilinx company official Virtex4 FPGA evaluation board circuit schematic diagram and the corresponding PCB document. Virtex FPGA is the hardware circuit design model for reference design. Which, PCB document format PADS. Platform: |
Size: 1281024 |
Author:程宣 |
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Description: xilinx公司出的FPGA开发板和原理图-The FPGA company Xilinx development board and the schematic diagram Platform: |
Size: 1650688 |
Author:zhangwen |
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Description: 利用Xilinx XC2C128（Xilinx CPLD）制做的台式电脑的Debug卡及原理图，对于不开机的主板，能侦测出CPU到北桥之间具体那根信号线空焊，用于快速维修不开机之主板。-The use of Xilinx XC2C128 (Xilinx CPLD) desktop computer system to do the Debug Card and schematic diagram for the motherboard does not boot, can detect the CPU to the Northbridge Flanagan signal line between the concrete and air welding, maintenance for fast boot the motherboard. Platform: |
Size: 1223680 |
Author:李德明 |
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Description: 利用XC9572－PQ44（Xilinx CPLD）制作的一款家用防盗报警器的Verilog源代码及原理图，当房门打开后，15秒内若没有按下Key1,则会自动拨打设定手机号（当然，要另连接一台手机）-Using XC9572-PQ44 (Xilinx CPLD) produced by a home burglar alarm of the Verilog source code and the schematic diagram, when the door opened, within 15 seconds if there is no pressing Key1, will be set automatically dial the phone number (of course, Another connection to a mobile phone) Platform: |
Size: 918528 |
Author:李德明 |
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Description: xilinx的Virtex_4开发板的参考布线和原理图-xilinx development board of reference of Virtex_4 wiring and schematic diagram Platform: |
Size: 2666496 |
Author:杨光灿 |
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